Generally, it takes 6 to 12 months from concept to receiving packaged prototypes. The exact timescale is obviously dependent of the scope of the project. The timescale of a project is an aspect of the ASIC design that we will evaluate once we complete our initial consultation and understand the scope. Once prototypes have been delivered, other timeline considerations include lab characterization, rework (if any) and production test development.
ASIC costs are usually broken into two aspects, a Non Recurring Engineering (NRE) Fee and a production unit cost.
The NRE is highly dependent on the scope of the project and the process technology selected to implement the design and is charged to the customer to cover the cost of engineering time, design software and engineering prototypes. The NRE is part of the risk sharing between Hexius Semiconductor and our customers for a successful partnership.
The unit cost is calculated with a number of factors including wafer costs, die size, yield percentage, volume, packaging and test requirements. With so many factors, the unit cost range can be anywhere between $0.25 to $1000.
Hexius Semiconductor is flexible in the cost structure of ASIC development as we recognize that each of our customers have different financial situations, structures, priorities and constraints. All of the possible options can be discussed during our initial consultation and understand the scope and economics of the program.
Absolutely. Whether your ASIC program has a total volume of 1000 units or 1,000,000 units per month, Hexius Semiconductor has development and manufacturing flows to accommodate the variety in ASIC program volumes.
This is our specialty as we are an analog-centric company. Most ASIC companies stating mixed-signal ASIC capabilities use analog cell libraries to implement the analog portions of the design without having the in house capability of doing true transistor level analog circuit design. Hexius Semiconductor engineers are experts in the art of analog design and can develop full customized analog circuits to incorporate into your ASIC that allows your solution to achieve a competitive advantage over your competition.
Absolutely. Hexius Semiconductor has the experience and the ability to either embed or assemble a system in package (SiP) microcontrollers ranging from 8051 to ARM Cortex cores.
Hexius Semiconductor treats the development of an ASIC as a partnership and in that regard, our customers are very involved throughout the whole process. This includes scheduled status meetings at the appropriate frequency, email and phone communication, site visits and design reviews that hold everyone accountable.
We recognize though, that our customers are not necessarily IC designers are therefore may not understand the finer details of the work we do. Conversely, we may not understand the finer details and proprietary technology of our customers. It is through the partnership mentality that allows for the exchange of ideas, praise and criticism during the ASIC’s development in order to achieve the common goal of producing an ASIC design that meets all parties’ expectations.
Hexius Semiconductor is not beholden to any one foundry and because we have the ability to customize the design, particularly the analog portions, we are able to select a process technology and foundry that best fits the performance specifications and economics without relying on existing libraries. It is also extremely important to select a foundry that is well established, reliable and will be supporting the process technology well beyond the expected longevity of the ASIC.
Most ASIC designs are well suited for the 0.35um, 0.18um and 90nm CMOS process technologies provided by On Semiconductor, XFAB, Global Foundries and TSMC. For certain designs that require BiCMOS or SiGe process technologies, we look towards Tower Jazz and Global Foundries. If our customer’s project are sensitive we also have available on shore ‘Trusted’ foundries.
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