Hexius Semiconductor’s configurable CF Series are an extremely low additive jitter clock fanout and multiplexer solution for jitter sensitive applications. The input receivers are very sensitive differential structures compatible with various input signal standards (sinewave, CMOS, LVPECL, LVDS, CML, HSCL) and can capture low amplitude signals (-26dBm). An internal divider circuit provides passthrough or synchronous frequency division operation. LVPECL or CMOS output stages provide multiple low-skew (< 30ps) copies of the input signal to build an efficient clock distribution network. They also function as translators from the input signal standard to LVPECL or CMOS standards. The CF Series operate in an extended temperature range of -55°C to 125°C to meet the demands of higher temperature environments.
The CF1xx products require standard external input signal terminations. The CF2xx products have an integrated 50Ω input signal termination with a configurable bias voltage.
|Part Number||Function||Input Channels||Output Channels||Input Type||Output Type||Max Output Frequency||Divide Ratios||Supply Voltage|
|CF128C||Multiplexer, Fanout||2||Selectable up to 8||Sine, CMOS, LVPECL, LVDS, CML, HCSL||CMOS||200MHz||2,4,8,16,32||2.5V - 3.3V|
|CF112P||Fanout||1||2||Sine, CMOS, LVPECL, LVDS, CML, HCSL||LVPECL||1000MHz||2,4,8,16,32||3.3V|
|CF124P||Multiplexer, Fanout||2||4||Sine, CMOS, LVPECL, LVDS, CML, HCSL||LVPECL||1000MHz||2,4,8,16,32||3.3V|
|CF128P||Multiplexer, Fanout||2||8||Sine, CMOS, LVPECL, LVDS, CML, HCSL||LVPECL||1000MHz||2,4,8,16,32||3.3V|